To write a VHDL code that counts up 00-99 and counts down 99-00 and cycles through. A countdown code is written to be implemented on a FPGA demonstration board. Two external buttons are connected to the input pins on the CPLD chip, the SW1 ( push button) and SW4 (piano key). The counter is designed to count up when SW4 input is high and count down when low and reset to 00 when SW1 is pressed. I have attached a copy of the code given to add onto and a copy of the FPGA board and task sheet. I need help with questions 1 and 2. Thanks Josna